Imagination and Actions Semi strengthen MIPS partnership

No RNS, but good announcement for MIPS division: 

London, UK and ZHUHAI, China – October 17th, 2016 – Imagination Technologies (IMG.L) and Actions Semiconductor Co., Ltd. (Nasdaq: ACTS) announce they are strengthening their long-term partnership around the MIPS architecture. Actions, one of China’s leading fabless semiconductor companies that provides comprehensive portable multimedia and mobile internet system-on-a-chip (SoC) solutions for portable consumer electronics, recently renewed its license for a range of MIPS CPUs from entry-level to high-performance. With these IP cores, Actions is creating SoCs targeting smart living room, Wi-Fi/Bluetooth audio, multimedia audio and video products.

Dr. Zhenyu Zhou, CEO of Actions Semiconductor: “Working with MIPS CPUs and the strong ecosystem supporting them, Actions has achieved numerous generations of successful chipsets based on this highly flexible and efficient architecture. We are continuing to create new generations of MIPS-based SoCs, and we are seeing these devices successfully expanding into a range of new segments. We are delighted to extend our relationship with Imagination for future generations of MIPS-based chips.”

Actions recently introduced the new MIPS-based V100 high-performance chipset for personal 3D cinema headsets which allows users to enjoy a high definition 3D big screen experience at anytime from anywhere. In addition, Actions’ MIPS-based, highly integrated, high-performance, low-power ATS3603 SoC is being used in a new robot, which is entering mass production this month.

Says Jim Nicholas, EVP MIPS Processor IP, Imagination: “Actions has long been an important partner of Imagination, working closely with us around products incorporating MIPS CPUs and PowerVR GPUs. With its world-class IC design capability and focus on innovation, Actions is taking these products into emerging segments such as VR and robotics. We look forward to working closely with Actions as it brings new generations of differentiated SoCs to market.”

Imagination offers a wide range of 32- and 64-bit MIPS CPUs: https://imgtec.com/mips/.

About Actions Semiconductor

Actions Semiconductor is one of China’s leading fabless semiconductor companies that provides comprehensive portable multimedia and mobile internet system-on-a-chip (SoC) solutions for portable consumer electronics. Actions Semiconductor products include SoCs, firmware, software, solution development kits, as well as detailed specifications of other required components. Actions Semiconductor also provides total product and technology solutions that allow customers to quickly introduce new portable consumer electronics to the mass market in a cost effective way. The Company is headquartered in Zhuhai, China, with offices in Shanghai, Shenzhen, Hong Kong and Taipei. For more information, please visit the Actions Semiconductor website at
http://www.actions-semi.com.

New MIPS I6500 adopted by MobilEye EyeQ5

Jim Nicholas clearly doing a great job at MIPS:

https://imgtec.com/news/press-release/imagination-rolls-new-heterogeneous-inside-mips-cpu/

London, UK – October 12th, 2016 – Imagination Technologies (IMG.L) announces the new MIPS Warrior I-class I6500 CPU, a multi-threaded, multi-core, multi-cluster design that delivers new levels of system efficiency and scalable computing for many-core heterogeneous designs. Target applications include advanced driver assistance systems (ADAS) and autonomous vehicles, networking, drones, industrial automation, security, video analytics, machine learning, and others which increasingly rely on heterogeneous computing.

Today’s heterogeneous SoC designs require a mix of high-performance CPU clusters and GPU or accelerator clusters all processing common datasets. The I6500 provides a highly scalable solution which can coherently implement optimized configurations of CPU cores within a cluster (‘Heterogeneous Inside’) as well as a variety of configurations of CPU clusters and GPU or accelerator clusters on a chip depending on the requirements of the system (‘Heterogeneous Outside’).

Says Jim Nicholas, EVP MIPS Processor IP, Imagination: “With the I6500 we are setting a new standard for scalable, heterogeneous many-core designs – and providing a highly differentiated solution for visionary companies that want to transform markets. One of these visionary companies is Mobileye, which is leading the way in ADAS and autonomous driving technologies with advanced, proven technology that continually pushes the envelope of innovation.”

The I6500 CPU will be at the heart of heterogeneous coherent processing clusters in Mobileye’s next-generation EyeQ®5 SoC, which is designed to act as the central computer performing sensor fusion for Fully Autonomous Driving (FAD) vehicles starting in 2020. The EyeQ5® will feature eight multi-threaded MIPS CPU cores coherently coupled with eighteen cores of Mobileye’s Vision Processors (VPs). The VPs provide exceptional computing power within extremely low power budgets by combining Mobileye’s broad range of algorithms for mono/multi-camera driver assistance/ autonomous systems, supported by its special vision accelerators and Imagination’s MIPS CPUs for ultra-efficient, real-time processing and control.

Elchanan Rushinek, SVP engineering, Mobileye, says: “Imagination’s multi-threaded MIPS CPUs have helped us achieve performance increases of more than 6x with each successive generation of EyeQ® SoCs. Now with the EyeQ5® we are looking at an 8x increase. The combination of Mobileye’s VPs and MIPS CPUs enables us to provide unrivalled computing power on a single processor while maintaining a very low power budget, and the hardware virtualization capability in the I6500 CPUs provides a solid foundation for an open software platform with multiple operating systems.”

Inside the MIPS I6500 CPU

The MIPS I6500 CPU is a 64-bit, multi-threaded, multi-core, multi-cluster CPU that is scalable from embedded to cloud. Key features include:

• Heterogeneous Inside: In a single cluster, designers can optimize power consumption with the ability to configure each CPU with different combinations of threads, different cache sizes, different frequencies, and even different voltage levels.
• Heterogeneous Outside: The latest MIPS Coherence Manager with an AMBA® ACE interface to popular ACE coherent fabric solutions such as those from Arteris and Netspeed lets designers mix on a chip configurations of processing clusters – including PowerVR GPUs or other accelerators – for high system efficiency.
• Simultaneous Multi-threading (SMT): Based on a superscalar dual issue design implemented across generations of MIPS CPUs, this proven feature enables execution of multiple instructions from multiple threads every clock cycle, providing higher utilization and CPU efficiency.
• Hardware virtualization (VZ): I6500 builds on the real time hardware virtualization capability pioneered in the MIPS I6400 core. Designers can save costs by safely and securely consolidating multiple CPU cores with a single core, save power where multiple cores are required, and dynamically and deterministically allocate CPU bandwidth per application.
• SMT + VZ: The combination of SMT with VZ in the I6500 offers “zero context switching” for applications requiring real-time response. This feature, alongside the provision of scratchpad memory, makes the I6500 ideal for applications which require deterministic code execution.
• Ideal for compute intensive, data processing and networking applications: The I6500 is designed for high-performance/high-efficiency data transfers to localized compute resources with data scratchpad memories per CPU, and features for fast path message/data passing between threads and cores.
• OmniShield-ready™: Imagination’s multi-domain security technology used across its processing families enables isolation of applications in trusted environments, providing a foundation for security by separation.
• Straightforward software development: The I6500 is based on the mature MIPS ISA which is broadly supported in the development ecosystem by multiple vendors. Customers adopting the I6500 can enjoy a wide choice of compilers, debuggers, operating systems, hypervisors and application software all optimized for the MIPS ISA.

Imagination offers a wide range of 32- and 64-bit MIPS CPUs: https://imgtec.com/mips/.

Availability

The I6500 CPU is available for licensing now, with general availability expected in the first quarter of 2017.